Integrated circuits require carefully controlled input signal voltage amplitudes and power supply amplitudes for proper operation. For instance, if the input signal amplitude to a linear MOS integrated circuit is excessive, the circuit usually will saturate, or worse, forward biasing parasitic diodes, causing destructive currents. Power supply voltages must also be kept within given ranges, although they are usually less critical once the operating parameters of the circuit have been established.
Where an excessively high input signal voltage is present, it is necessary to reduce its amplitude by such means as a voltage divider. The voltage divider is most economical if it is integrated with the circuit into the semiconductor chip itself.
Integration of a voltage divider into a MOS chip, with isolation of the source has previously been provided using transistor voltage dividers, since transistors have traditionally been the easiest elements to fabricate. MOSFET transistors used in this manner typically have their gates short circuited to their drains, to form diodes. Since the diodes have predetermined threshold voltage drops, series arrays of such diodes can provide voltage division.
However, besides providing a voltage division, such diodes automatically set up bias levels at the divider output relative to the chip substrate potential due to their inherent threshold voltages. Consequently the amount of voltage division available as well as the relative positive and negative input signal amplitudes which can be accommodated before saturation is limited by the self biasing established as a result of the diode doping level, the number of series connected diodes, etc.
In the present invention, there are no diode threshold utilized to provide the voltage division, and consequently the self biasing offset is eliminated. Consequently there is not saturation point which is based on the number of diodes in series, and the designer is given substantially greater freedom in designing a given input voltage drop. Further, the design freedom now allows the integration of an on-board chip power supply in the semiconductor integrated circuit with which it is to operate.
In the present invention, an integrated capacitor voltage divider is utilized. While one would otherwise expect threshold potentials to be present due to doping of the semiconductor substrate to form a capacitor plate, and thus to exhibit undesirable effects due to the presence of the diffused or implanted doped region within the substrate, the present structure is fabricated so that the resulting semiconductor surface is already heavily inverted even with no external bias potential applied. Accordingly additional potential applied to the doped region does not shift the operating point to a threshold region where threshold potentials would affect the stability of the output signal with changes in input signal.
The present invention provides for the on-board derivation of signal voltages which are substantially different in amplitude and with respect to external ground than that of the input voltage. Means is also provided for establishing an on-board power supply voltage of AC or DC form.
Further, the present invention provides means for deriving power supply voltages from hitherto unexpected or prviously unsuitable sources, such as an external clock source, which is particularly useful for use with CMOS integrated circuitry. In this application other power supply input leads may be dispensed with, assuming that the clock source can supply all power supply requirements.
Accordingly the present structure provides a substantially more flexible and improved means for supplying power to the integrated circuit, for supplying signals to the integrated circuit which are compatible therewith from hitherto incompatible sources, using circuitry which is integrated in the chip itself, while at the same time being of more economical form. Further, the structure can be fabricated in MOS circuitry using either metal gate, double polycrystalline layer technology or the like.